Fast Ip Address Lookup Engine for Soc Integration
نویسندگان
چکیده
IP packet forwarding is a key operation in internet routers and the limiting factor is the IP address lookup. Since almost a whole router is integrated on a chip it is important to design the functional blocks with SoC integration in mind. Here a hardware architecture for IP address lookup based on the kmultibit trie search algorithm is presented. The designed and simulated architecture is based on one SRAM access in series with two multiplexers and is claimed to be optimally fast. Based on the performance of embedded SRAMs an approximate throughput of 500 MPackets/s is achieved when implemented in 0.18 μm technology. Memory requirements, multiplexing, scaling, and updating issues of the architecture as well as 2-dimensional search are described.
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